Given the timing of yesterday's Cortex A53 based Snapdragon 410 announcement, our latest Ask the Experts installment couldn't be better. Peter Greenhalgh, lead architect of the Cortex A53, has agreed to spend some time with us and answer any burning questions you might have on your mind about ARM, directly.

Peter has worked in ARM's processor division for 13 years and worked on the Cortex R4, Cortex A8 and Cortex A5 (as well as the ARM1176JZF-S and ARM1136JF-S). He was lead architect of the Cortex A7 and ARM's big.LITTLE technology as well. 

Later this month I'll be doing a live discussion with Peter via Google Hangouts, but you guys get first crack at him. If you have any questions about Cortex A7, Cortex A53, big.LITTLE or pretty much anything else ARM related fire away in the comments below. Peter will be answering your questions personally in the next week.

Please help make Peter feel at home here on AnandTech by impressing him with your questions. Do a good job here and I might be able to even convince him to give away some ARM powered goodies...

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  • Peter Greenhalgh - Wednesday, December 11, 2013 - link


    Pork with chilli is good.
  • lightshapers - Wednesday, December 11, 2013 - link

    Hey Mr Greenhalgh,
    Actually working in a great SoC company, I have recently been working on A12 based soc which was supposed to be an improvement over the A9 by a certain amount of dmips/mhz, but much more power-effcient than the a7/a15 couple in a big little. It was at a point that having a sole 4xcore a12 was better in terms of performance in the low perf (than the 4xa7), as much as better in high speed because generating less power than the 4xa15, which makes today's Soc throttling around 1.3Ghz, thus allowing sustainable perf at a higher frequency. Best of all, it allows not using the CCI which has been subject to controversy (hmp, smp, ...)
    This CPU has not been really highly markettized (forgive this ugly word), because today the fashion is over the A53/A57 big.LITTLE couple and the possibly useless 64bit platforms.
    this was my background (personnal thought).
    Now my question: are we really going to see a CPU performance improvement for the small platform (smartphone) with the A53/57 or are these CPU specified for heavy use, which would indicate that thermal dissipation will prevent a hard use on smartphone. Should the SoC vendor concentrate on 32Bit a7/a15/a12 version that could be again improved in the futur in order to really see more performance.
    Are you packaging a 8*a12 that would possibly make sense in high end soc?
    Are you going to improve the power domain sharing inside your deliveries? It's still a nonsense to have coresight IP inside a CPU domain, as it prevent debugging once CPUs are sleeping...

  • lightshapers - Friday, December 13, 2013 - link

    I wish I had gotten your interest on my questions...
  • wrkingclass_hero - Wednesday, December 11, 2013 - link

    What is ARM's most power efficient processing core? I don't mean using the least power, I mean work per watt. How does that compare to Intel and IBM? Also, I know that ARM is trying to grow in the server market, given the rise of the GPGPU market, do you foresee ARM leveraging their MALI GPUs for this in the future? Finally, does ARM have any interest or ambition in scaling up to the desktop market?
  • wrkingclass_hero - Wednesday, December 11, 2013 - link

    I have another question. Why is ARM pursuing the big.LITTLE paradigm? Wouldn't it be more economical to use the extra silicon to make larger, more powerful cores that run at a lower clockspeed?
  • mercury555 - Wednesday, December 11, 2013 - link

    That is a very good point. I can soo imagine ARM telling their customers: you are anyways using 4X area, let's swap that for a BIG core for laptop/ultra-book class products
  • Peter Greenhalgh - Wednesday, December 11, 2013 - link

    Hi wrkingclass_hero,

    In the traditional applications class, Cortex-A5, Cortex-A7 and Cortex-A53 have very similar energy efficiency. Once a micro-architecture moves to Out-of-Order and increases the ILP/MLP speculation window and frequency there is a trade-off of power against performance which reduces energy efficiency. There’s no real way around this as higher performance requires more speculative transistors. This is why we believe in big.LITTLE as we have simple (relatively) in-order processors that minimise wasted energy through speculation and higher-performance out-of-order cores which push single-thread performance.

    Across the entire portfolio of ARM processors a good case could be made for Cortex-M0+ being the more energy efficient processor depending on the workload and the power in the system around the Cortex-M0+ processor.
  • Xajel - Wednesday, December 11, 2013 - link

    When running 32bit apps on 64bit OS, is there's any performance hit compared to 64bit apps on 64bit OS ?

    And from IPC/Watt perspective, how A53/A57 is doing compared to A7/A15... I mean how much more performance we will get in the same power usage compared to A7/A15... talking about the whole platform ( memory included )
  • Peter Greenhalgh - Wednesday, December 11, 2013 - link

    The performance per watt (energy efficiency) of Cortex-A53 is very similar to Cortex-A7. Certainly within the variation you would expect with different implementations. Largely this is down to learning from Cortex-A7 which was applied to Cortex-A53 both in performance and power.
  • /pigafetta - Wednesday, December 11, 2013 - link

    Is ARM thinking of adding hardware transactional memory instructions, similar to Intel's TSX-NI?

    And would it be possible to design a CPU with an on-chip FPGA, where a program could define it's own instructions?

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