GlobalFoundries Unveils 12LP+ Technology: Massive Performance & Power Improvementsby Anton Shilov on September 25, 2019 12:00 PM EST
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GlobalFoundries has introduced its 12LP+ fabrication process that relies on the groundwork set by its 14LPP and 12LP technologies and provides significant improvements when it comes to performance, power, and area (PPA) scaling. The specialty foundry positions the technology for developers of chips for cloud and edge AI applications.
GlobalFoundries’ 12LP+ manufacturing technology builds upon the company’s 12LP process yet enables a 20% increase in performance (at the same power and complexity) or a 40% reduction in power requirements (at the same clocks and complexity) as well as a 15% improvement in logic area scaling when compared to 12LP platform. Among other things, 12LP+ supports 0.5V SRAM bit cells (which probably use IP that the company designed for its 7 nm nodes). In addition, GF developed a new 2.5D interposer that enables 12LP+ SoCs to work with HBM memory.
|Advertised PPA Improvements of New Process Technologies
Data announced by companies during conference calls, press briefings and in press releases
|GF's 7nm Gen 1
The foundry says that its 12LP+ uses a mature design and production ecosystem and provides advantages comparable to those of 7 nm-class fabrication process. Meanwhile, significant improvements and a new PDK point to new design libraries along with numerous new features, which means that GlobalFoundries’ clients will have to make significant investments in order to take advantage of 12LP+. Those investments will still be 50% lower than the cost of transition to a 7 nm-class technology, according to GlobalFoundries.
Michael Mendicino, vice president of Digital Technology Solutions at GF, said the following:
“Our 12LP+ solution already offers clients a majority of the performance and power advantages they would expect to gain from a 7nm process, but their NRE (non-recurring engineering) costs will average only about half as much, a significant savings. Additionally, because the 12 nm node has been running longer and is much more mature, clients will be able to tape-out quickly and take advantage of the growing demand for AI technology.”
To speed up development of 12LP+ chips for its clients, GlobalFoundries has asked Arm to design Arm Artisan physical IP and POP IP required by AI-focused SoCs. That IP is said to be compatible with 12LP. Meanwhile, the 12LP+ PDK is already available and several clients have begun to design chips using the technology. GlobalFoundries expects its customers to tape out the first 12LP+ SoCs sometimes in the second half of 2020 and produce them in volume in 2021.
GlobalFoundries will manufacture 12LP+ chips using deep ultraviolet (DUV) lithography with argon fluoride (ArF) excimer lasers operating on a 193 nm wavelength at its Fab 8 in New York, USA. Presumably, the company will use the same equipment that is currently used to make SoCs at 12LP and 14LPP nodes.
- GlobalFoundries Adds 12LP Process for Mainstream and Automotive Chips; AMD Planning 12LP CPUs & GPUs
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- GlobalFoundries Stops All 7nm Development: Opts To Focus on Specialized Processes
- Change of Strategy: A New GlobalFoundries CEO in Dr. Thomas Caulfield
- Samsung Details 11LPP Process Technology: 10 nm BEOL Meets 14 nm Elements
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quorm - Wednesday, September 25, 2019 - linkIn isolation, that sounds great, but it's hard to see things at GF too favorably amid the lawsuit and asset sales.
Mday - Wednesday, September 25, 2019 - linkI disagree on the lawsuit end. GF is a competitor, and neither a patent troll (e.g., a patents holding company that does not practice any business other than litigation) nor a company that is abusing FRAND licenses. GF has a right to defend its IP. The merits of the case will decided on later, and lawsuits like this may be settled, who knows.
azfacea - Wednesday, September 25, 2019 - linkit absoletly is a patent troll. it is going out of semi manufacturing and into the patent troll business. for every gf patent TSMC has 100 patents that GF is infringing.
"the merits of the case" is code for a patent troll thats planning to shut down its fabs and wants TSMC to pay alimony
Haawser - Wednesday, September 25, 2019 - linkA 12LP+ APU with 4/8GB of HBM as a graphics cache would be pretty sweet. Dual DDR4 just doesn't cut it in bandwidth terms, example- 11 CU graphics in R5 3400G has ~50GB/s. 16 CU RX 560 has ~112GB/s. (And the APU has to share that with the CPU too). It's not enough.
scineram - Thursday, September 26, 2019 - linkNo.
Cooe - Thursday, September 26, 2019 - linkWhat the hell is wrong with you?
drexnx - Wednesday, September 25, 2019 - linknice to see glofo actually iterating and still moving forward with new process tech, even though they dropped their 7nm node
Irata - Thursday, September 26, 2019 - linkAnd I'd say "why not". Intel managed to get very impressive gains out of their 14nm process, so if GF sticks to their 12 nm process for the next few years, they may also see good improvements.
And like danielfranklin says below, not all IC need to be on the latest nodes. I'd say this would even be an option for low(est) budget X86 or ARM CPU if the price is low enough.
Eliadbu - Wednesday, September 25, 2019 - linkStill doesn't look yo be competitive in terms of density power or performance to tsmc 7nm+. And by the time they would start volume manufacture this process - 2021 TSMC will already have 5nm at volume manufacturing for some time. The last aspect where GF could play a role is price but TSMC older processes will get more mature and compete in this front as well. As the saying goes too little too late.
danielfranklin - Wednesday, September 25, 2019 - linkIts not intended to be bleeding edge.
Far more of the worlds ICs are made on older nodes then the latest ones.