Update 06/08: Intel has since backtracked on its initial statements, clarifying that while a 28-core part is coming in Q4 of this year, its stock frequency will not be 5GHz. Rather this was a (very poorly communicated) overclocking demo of the upcoming part. For more details, please see this article.

Alongside the launch of Intel’s first 5 GHz processor, the 6-core Core i7-8086K, Intel today also showcased a 28-core single socket machine also running at 5 GHz. The system on display scored 7334 in Cinebench R15, and Gregory Bryant (SVP and GM of Intel Client Computing Group) explicitly stated that it would be coming in Q4 this year.

No other details were provided, however for it to exist in a current platform, this new processor would likely be in LGA2066 (X299) or LGA3647 (the server socket). Intel technically already makes 28-core monolithic designs in the Intel Xeon Scalable Platform with the Xeon Platinum 8180, which is a $10k processor, which runs a lot slower than 5.0 GHz.

Personally, I feel this new processor is not a higher binned Platinum 8180. Going up from 2.8 GHz base / 3.5 GHz turbo to 5.0 GHz all-core frequency is a big step, assuming the 5.0 GHz value was not an overclock. I would fully expect that this is the point where Intel starts introducing EMIB to CPUs. (ed: FWIW, I disagree with Ian; my money is on a heavily binned 28-core XCC processor made on 14++. We've seen that Intel can do 5GHz on that process with the 8086K)

Last week I discussed the potential death of Intel’s low-end core design for high-end desktop, because it was being eclipsed by the mainstream parts. The only way Intel would be able to reuse the server versions of those low-core count designs would be to enable its embedded multi-die interconnect bridge (EMIB) technology to put two or more of the smaller dies on the same package. This would allow Intel do amortize costs in the same way AMD does by making use of higher yielding parts (as die size goes down, yield goes up).

Intel’s EMIB has a potentially high bi-directional bandwidth, so it would be interesting to see if Intel would bind two dies together and if there is any additional latency or bandwidth decrease with two dies together. With 28 cores, that would subdivide by two to 14-each, but not to four. So this processor is likely to be two 14-core dies using EMIB… which would actually be Intel’s HCC (high-core-count) processor design.

To add something extra to the mix, Intel might not be using EMIB at all. It could just as easily be the QPI interface on package, much how the company is using the Xeon + FPGA products announced recently.

So our primary questions to Intel would be:

  1. Monolithic or multi-die
  2. QPI or EMIB
  3. Socket
  4. Die size
  5. TDP / Power consumption at 5 GHz

TDP is a big part of the equation here. 28 cores at 5.0 GHz doesn’t come for free. The next questions are around price and launch date.



There's the discussion about cutting into Intel's 1P market with such a product. But also, consider that at CES that Supermicro rated their X299 motherboards as supporting 300W processors, so it could easily correlate this processor to LGA2066 and a 300W TDP. That would be... fun... I guess?

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View All Comments

  • ChristopherFortineux - Friday, June 8, 2018 - link

    This will not make it into a refresh of the MacPro. Reply
  • Kevin G - Tuesday, June 5, 2018 - link

    The choice between QPI and EMIB doesn't make any sense as QPI is Intel's coherent interconnect and EMIB is a multidie packaging technique.

    It would make more sense as questions 1a of QPI or mesh interconnect 1b EMIB, interposer or wirebonding.
  • casperes1996 - Tuesday, June 5, 2018 - link

    Who wrote the "FWIW I disagree with Ian" part? Reply
  • Luckz - Tuesday, June 5, 2018 - link

    Ryan? Reply
  • Ryan Smith - Tuesday, June 5, 2018 - link

    Yes. Reply
  • Kevin G - Tuesday, June 5, 2018 - link

    I'm not sure how much binning is necessary. The cores themselves are engineered to go past 4 Ghz. That catch on the 28 core server parts is that Intel wants to maintain a 205W TDP max which limits both clock speeds and voltages at that core count. Uncapping that power consumption opens up a lot of headroom given good cooling. Reply
  • ChristopherFortineux - Friday, June 8, 2018 - link

    Intel will have to state soon that this was clearly done specifically only for the event. Realistically people do not have a problem with the core count but with the Clocks and the deceptive nature of the event done this way. Reply
  • Dr. Swag - Tuesday, June 5, 2018 - link

    RIP vrms Reply
  • Afroman94 - Tuesday, June 5, 2018 - link

    Hopefully it's EMIB. Although with the cooling solutions in place, it could be a binned 8180.
    Another thing..Why does CB show RX 570 as graphics adapter?
  • realistz - Tuesday, June 5, 2018 - link

    28 cores 5GHz and AMD can’t get out of 4.3GHz with one core lol Reply

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