"It looks the same on the powerpoint slide, but they are very different". The place is Austin, where an AMD engineer is commenting on the slides describing the Zen and Skylake schematics. In Portland, the Intel representatives could not agree more: "the implementation matters and is completely different". "We have to educate our customers that they can not simply compare AMD's 32 core with our 28 cores".

This morning kicks off a very interesting time in the world of server-grade CPUs. Officially launching today is Intel's latest generation of Xeon processors, based on the "Skylake-SP" architecture. The heart of Intel's new Xeon Scalable Processor family, the "Purley" 100-series processors incorporate all of Intel's latest CPU and network fabric technology, not to mention a very large number of cores.

Meanwhile, a couple of weeks back AMD soft-launched their new EPYC 7000 series processors. Based on the company's Zen architecture and scaled up to server-grade I/O and core counts, EPYC represents an epic achievement for AMD, once again putting them into the running for competitive, high performance server CPUs after nearly half a decade gone. EPYC processors have begun shipping, and just in time for today's Xeon launch, we also have EPYC hardware in the lab to test.

Today's launch is a situation that neither company has been in for quite a while. Intel hasn't had serious competition in years, and AMD has't been able to compete. As a result, both companies are taking the other's actions very seriously.

In fact we could go on for much longer than our quip above in describing the rising tension at the headquarters of AMD and Intel. For the first time in 6 years (!), a credible alternative is available for the newly launched Xeon. Indeed, the new Xeon "Skylake-SP" is launching today, and the yardstick for it is not the previous Xeon (E5 version 4), but rather AMD's spanking new EPYC server CPU. Both CPUs are without a doubt very different: micro architecture, ISA extentions, memory subsystem, node topology... you name it. The end result is that once again we have the thrilling task of finding out how the processors compare and which applications their various trade-offs make sense.

The only similarity is that both server packages are huge. Above you see the two new Xeon packages –with and without an Omni-Path connector – both of which are as big as a keycard. And below you can see how one EPYC CPU fills the hand of AMD's CEO Dr. Lisa Su. 

Both are 64 bit x86 CPUs, but that is where the similarities end. For those of you who have been reading Ian's articles closely, this is no surprise. The consumer-focused Skylake-X is the little brother of the newly launched Xeon "Purley", both of which are cut from the same cloth that is the Skylake-SP family. In a nutshell, the Skylake-SP family introduces the following new features: 

  1. AVX-512 (Many different variants of the ISA extension are available)
  2. A 1 MB (instead of a 256 KB) L2-cache with a non-inclusive L3
  3. A mesh topology to connected the cores and L3-cache chunks together

Meanwhile AMD's latest EPYC Server CPU was launched a few weeks ago:

On the package are four silicon dies, each one containing the same 8-core silicon we saw in the AMD Ryzen processors. Each silicon die has two core complexes, each of four cores, and supports two memory channels, giving a total maximum of 32 cores and 8 memory channels on an EPYC processor. The dies are connected by AMD’s newest interconnect, the Infinity Fabric...

In the next pages, we will be discussing the impact of these architectural choices on server software. 

AMD's EPYC Server CPU
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  • alpha754293 - Tuesday, July 11, 2017 - link

    Pity that OpenFOAM failed to run on Ubuntu 16.04.2 LTS. I would have been very interested in those results. Reply
  • farmergann - Tuesday, July 11, 2017 - link

    Are you trying to hide the fact that AMD's performance per watt absolutely dominates intel's, or have you simply overlooked one of, if not the, single most important aspects of server processors? Reply
  • Ryan Smith - Tuesday, July 11, 2017 - link

    Neither. We just had very little time to look at power consumption. It's also the metric we're the least confident in right now, as we'd like to have a better understanding of the quirks of the platform (which again takes more time). Reply
  • Carl Bicknell - Wednesday, July 12, 2017 - link

    Ryan / Ian,
    Just to let you know there are better chess benchmarks than the one you've chosen. Stockfish is an example of a newer program which better uses modern CPU architecture.
    Reply
  • NixZero - Tuesday, July 11, 2017 - link

    "AMD's MCM approach is much cheaper to manufacture. Peak memory bandwidth and capacity is quite a bit higher with 4 dies and 2 memory channels per die. However, there is no central last level cache that can perform low latency data coordination between the L2-caches of the different cores (except inside one CCX). The eight 8 MB L3-caches acts like - relatively low latency - spill over caches for the 32 L2-caches on one chip. "
    isnt skylake-x's l3 a victim cache too? and divided at 1.3mb for each core, not a monolytic one?
    Reply
  • Ian Cutress - Tuesday, July 11, 2017 - link

    That's what a 'spill-over' cache is - it accepts evicted cache lines. Reply
  • NixZero - Wednesday, July 12, 2017 - link

    so why its put as an advantage for intel cache, which is spill over too? Reply
  • JonathanWoodruff - Wednesday, July 12, 2017 - link

    Since the Intel one is all on one die, a miss to a "slice" of cache can be filled without DRAM-like latencies from another slice. Since AMD has it's last level caches spread across dies, going to another cache looks to be equivalent latency-wise to going to DRAM. It wouldn't necessarily have to be quite that bad, and I would expect some improvement here for Zen2. Reply
  • Martin_Schou - Tuesday, July 11, 2017 - link

    This has to be wrong:

    CPU Two EPYC 7601 (2.2 GHz, 32c, 8x8MB L3, 180W)
    RAM 512 GB (12x32 GB) Samsung DDR4-2666 @2400

    12 x 32 GB is 384 GB, and 12 sticks doesn't fit nicely into 8 channels. In all likelihood that's supposed to be 16x32 GB, as we see in the E52690
    Reply
  • Dr.Neale - Tuesday, July 11, 2017 - link

    I find myself puzzled by the curious omission in this article of a key aspect of Server architecture: Data Security.

    AMD has a LOT; Intel, not so much.

    I would think this aspect of Server "Performance" would be a major consideration in choosing which company's Architecture to deploy in a Secure Server scenario. Especially in light of Recent Revelations fuelling Hacking Headlines in the news, and Dominating Discussions on various social media websites.

    How much is Data Security worth?

    A topic of EPYC consequence!
    Reply

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