2nm
Synopsys has introduced the industry's first full-stack AI-powered suite of electronic design automation tools that covers all stages of chip design, from architecture to design and implementation to manufacturing. The Synopsys.ai suite promises to radically reduce development time, lower costs, improve yields, and enhance performance. The set of tools is set to be extremely useful for chips set to be made on leading-edge nodes, such as 5nm, 3nm, 2nm-class, and beyond. Chip Design Challenges As chips gain complexity and adopt newer process technologies, their design and manufacturing costs escalate to unprecedented levels. Designing a reasonably complex 7 nm chip costs about $300 million (including ~ 40% for software). In contrast, the design cost of an advanced 5 nm processor exceeds $540 million (including software), according to...
NVIDIA's cuLitho to Speed Up Computational Lithography for 2nm and Beyond
Production of chips using leading-edge process technologies requires more compute power than ever. To address requirements of 2nm nodes and beyond, NVIDIA is rolling out its cuLitho software library...
28 by Anton Shilov 4 days agoSamsung Foundry Outlines Roadmap Through 2027: 1.4 nm Node, 3x More Capacity
Samsung outlined its foundry business roadmap for the next five years at its Foundry Forum event last week. The company plans to introduce its next generation fabrication technologies in...
14 by Anton Shilov on 10/10/2022Samsung's $15 Billion R&D Complex to Overcome Limits of Semiconductor Scaling
Samsung on Friday broke ground for a new semiconductor research and development complex which will design new fabrication processes for memory and logic, as well as conduct fundamental research...
26 by Anton Shilov on 8/19/2022TSMC: N2 To Start With Just GAAFETs, Add Backside Power Delivery Later
When TSMC initially introduced its N2 (2 nm class) process technology earlier this month, the company outlined how the new node would be built on the back of two...
16 by Anton Shilov on 6/29/2022TSMC Unveils N2 Process Node: Nanosheet-based GAAFETs Bring Significant Benefits In 2025
At its 2022 Technology Symposium, TSMC formally unveiled its N2 (2 nm class) fabrication technology, which is slated to go into production some time in 2025 and will be...
24 by Anton Shilov on 6/16/2022TSMC Roadmap Update: N3E in 2024, N2 in 2026, Major Changes Incoming
Taiwan Semiconductor Manufacturing Co. has solid plans for the next few years, but the foundry's manufacturing technology design cycles are getting longer. As a result, to address all of...
21 by Anton Shilov on 4/22/2022TSMC Roadmap Update: 3nm in Q1 2023, 3nm Enhanced in 2024, 2nm in 2025
TSMC has introduced a brand-new manufacturing technology roughly every two years over the past decade. Yet as the complexity of developing new fabrication processes is compounding, it is getting...
32 by Anton Shilov on 10/18/2021Samsung Foundry: 2nm Silicon in 2025
One of the key semiconductor technologies beyond 3D FinFET transistors are Gate-All-Around transistors, which show promise to help extend the ability to drive processors and components to higher performance...
29 by Dr. Ian Cutress on 10/6/2021IBM Creates First 2nm Chip
Every decade is the decade that tests the limits of Moore’s Law, and this decade is no different. With the arrival of Extreme Ultra Violet (EUV) technology, the intricacies...
118 by Dr. Ian Cutress on 5/6/2021TSMC to Spend $100B on Fabs and R&D Over Next Three Years: 2nm, Arizona Fab & More
TSMC this week has announced plans to spend $100 billion on new production facilities as well as R&D over the next three years. The world's largest contract maker of...
45 by Anton Shilov on 4/2/2021Intel’s Manufacturing Roadmap from 2019 to 2029: Back Porting, 7nm, 5nm, 3nm, 2nm, and 1.4 nm
One of the interesting disclosures here at the IEEE International Electron Devices Meeting (IEDM) has been around new and upcoming process node technologies. Almost every session so far this...
138 by Dr. Ian Cutress on 12/11/2019