3DLabs' P10 Visual Processing Unit - When a CPU & GPU Collide

Not a Tile-Based Architecture

While the P10 is thankfully devoid of most horrible marketing names, the one name they did use was done pretty poorly. In the rasterization to viewport space stage (4) the P10 uses what 3DLabs calls the Tile Processor. The tile processor does split up the rendering of the scene into tiles but that does not make the P10 a deferred rendering architecture.

Instead, the P10 divides the scene up into 8x8 blocks of pixels and processes the scene in that matter. This method of was chosen simply because it makes the most efficient use of the P10's caches. 3DLabs has done internal simulation to illustrate this and the method in which the P10 renders is best optimized for their architecture. In the end the main thing to take away from this is that the P10 is an immediate-mode renderer just like the GeForce4 or Radeon 8500.

3DLabs has outfitted the P10 with what they call a visibility processor that performs the z-occlusion culling in the pipeline. We didn't get much information on the visibility processor but it's safe to assume that the feature set is comparable to what we've seen from ATI and NVIDIA.