M.2 SSDs nowadays are used for a wide variety of applications, whereas Samsung tried to promote its next generation small form-factor (NGSFF) for enterprise-grade solid-state storage under the M.3 moniker (yet later renamed it to NF1). Apparently, there are companies that are working on SSDs in the so-called M.4 form-factor. One of such drives was spotted at Computex.

Silicon Motion demonstrated Agylstor’s M.4 NVMe SSD at the trade show earlier this month. The drive is based on SMI’s own enterprise-grade SM2270 controller based on three pairs of ARM Cortex R5 cores to support 2KB LDPC error correction and featuring 16 NAND channels with 8 CE per channel (128 CE in total) as well as a PCIe 3.0 x8 interface. Meanwhile, the SSD was assembled by SMART Modular.

Agylstor’s M.4 NVMe drive is essentially two M.2 SSDs (PCBs) glued together. The construction allows to install 16 NAND packages (eight on both sides) and thus offer an doubled capacity. Meanwhile, a PCIe 3.0 x8 interface promises a very strong performance. Keeping in mind that we are talking about an enterprise-grade controller and appropriate drives, we mean sustained performance, not peak performance.

Agylstor is a startup that develops specialized storage subsystems for a wide variety of applications from drones to video & film production as well as from IoT to oil & gas exploration. That said, Agylstor does not necessarily need to make SSDs compatible with general-purpose PCs for many reasons.

At present, it is unclear when Agylstor plans to release its M.4 NVMe SSDs.

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  • shabby - Saturday, June 15, 2019 - link

    When intel finally comes out with pcie4 you'll be licking your wounds.
  • Korguz - Sunday, June 16, 2019 - link

    shabby... and when will that be?? mid 2020 ???
  • brakdoo - Friday, June 14, 2019 - link

    Max read 3.2 GB/s? You don't need more than pcie 3.0 x4 for that. And 16 channels? 8 channel drives have the same speed. At least IOPS are good.
  • DanNeely - Friday, June 14, 2019 - link

    something's off on that specsheet. The performance is listed for U.2 which is only an x4 interface. Combined with the numbers being dead on for an x4 3.0 bus I suspect someone in marketing may have screwed up the copy/paste when printing them. Either that or "2 m.2 glued together" doesn't just mean the physical form factor; but that it actually appears to the US as two drives each with 3.2/2.8gbps of io. The latter seems rather silly since in that case your low production volumes probably trump any savings from the marginally lower part count in the system.
  • jordanclock - Friday, June 14, 2019 - link

    The two U.2 could appear as one device. It would just take the x4 lanes of both interfaces. As the article says, this company is aiming for specialized systems and their numbers are for sustained throughput, not burst. So x4 is fine for sustained, but they're not that far off from saturating x4 and thus x8 makes sense.
  • azfacea - Friday, June 14, 2019 - link

    PCI-SIG should just trademark m.3 m.4 m.5 .... m.20 to stop every fart being branded as m.x
    seriously WTF? i have no problem with this product existing but imagine if logitech and razer started inventing USB 4, USB 5, WIFI 8 and what not
  • Santoval - Friday, June 14, 2019 - link

    This looks like it only allows for more flash capacity, rather than more performance. Its specs (save perhaps the random 4KB read IOPS) are beaten by the cutting edge M.2 PCIe 3.0 x4 SSDs, while the first M.2 PCIe 4.0 x4 SSDs that just cropped up are already well beyond this in performance.

    On the other hand if these numbers indeed refer to fully sustained performance then the comparison might be difficult, since commercial SSD vendors only report peak performance numbers. That would still suggest higher sustained performance than any M.2 PCIe 3.0 x4 SSD though, but not necessarily than the newest M.2 PCIe 4.0 x SSDs,
  • erinadreno - Friday, June 14, 2019 - link

    I don't recall any commercial drive begin able to achieve 800K random read ops, especially given E16 is just E12 with pcie 4.0 PHY. Although they might benefit from higher bus bandwidth, but they only implements 8 channel thus have inferior random IOPS.
  • peevee - Monday, June 17, 2019 - link

    It could only be 800K with something like 128+ queue length. You cannot get around PCIe + flash latencies by making the buses wider.
  • jordanclock - Friday, June 14, 2019 - link

    The sustained vs peak numbers are likely because this is aimed at industries where there will be large amounts of continuous bandwidth usage. They likely don't care much about peak speeds, only that they're high enough for occasional bursts.

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