In a new presentation for investors AMD announced a more precise launch plan for its client APUs and CPUs for desktop, mobile, and server computers. The company is preparing to update its whole lineup of products for different types of client and server machines later this year.

As it turns out, AMD intends to release its 2nd Generation Ryzen Pro mobile products for notebooks this spring. AMD also plans to introduce its 3rd Generation Ryzen processors sometimes in the middle of the year. A bit later on the company is set to launch its 3rd Generation Ryzen Threadripper CPUs for extreme desktops and workstations. AMD’s codenamed Rome processors for servers are also due in 2019, but the manufacturer does not elaborate about their exact timing.

AMD’s 2nd Gen Ryzen Pro 3000-series quad-core processors are based on the Zen+ microarchitecture and are made using GlobalFoundries’ 12LP process technology, just like their non-Pro counterparts. The latter are set to become available in the near future, so we are going to learn more about what to expect from these upcoming APUs shortly.

AMD’s 3rd Gen Ryzen processors for desktops rely on the brand-new design code-named Matisse. Matisse features two dies: a chiplet die containing eight cores based on the Zen 2 microarchitecture, and built using TSMC’s 7N manufacturing process; and an I/O die featuring PCIe 4.0 lanes, and built using GlobalFoundries’ 14LPP fabrication technology.

AMD’s 2nd Gen EPYC (codenamed Rome) and 3rd Gen Ryzen Threadripper processors have a lot in common. EPYC will have eight 7nm Zen 2-based chiplets to provide up to 64 cores and an IO die. We expect the 3rd Gen Ryzen Threadripper to be built on the same platform, but we don't expect to see parity on power/core/frequency based on how the first generation Threadripper only offered half the cores of the 1st Gen EPYC. We would be pleasantly surprised if there was core configuration parity!

This is a breaking news. We are adding more details as we learn them.

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Source: AMD

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  • GreenReaper - Thursday, March 7, 2019 - link

    Like Intel would give away the most useful parts of AVX-512 on low-level CPUs, anyway, if it could get away with *not* doing so to enable product segmentation. They didn't enable AVX on Celeron until Kaby Lake Refresh this January, when suddenly it *and* AVX2 magically appeared:
    https://en.wikipedia.org/wiki/List_of_Intel_Celero...

    Of course, that's Celeron Mobile, not the desktop CPUs. And why? Because Intel's own argument was being used against them with the AMD's 2xxxU mobile, which have them both. Never mind that power usage in that segment makes the benefit of such code dubious.

    Having more cores will trump AVX-512 most of the time. Especially since AVX-512 can limit your max turbo speed. Intel themselves have backed off their own compiler from using AVX-512 instructions in many cases, because of the negative impact they have on other executing code:
    https://lemire.me/blog/2018/08/13/the-dangers-of-a...

    The other comments there are worth reading too - did you know there are multiple levels of AVX clock-reduction? Naturally it's worse if more CPU cores are involved, because it uses more power:
    https://en.wikichip.org/wiki/intel/xeon_gold/5120#...

    There are clear potential advantages to new instructions, but unclear costs, In many cases the benefit is illusionary, because the CPU simply can't run at full power using those instructions. Perhaps these restrictions will be alleviated by 10nm. Until then, we can't rely on it being useful, and therefore it's not going to factor into our purchasing decisions.
  • Sivar - Friday, March 8, 2019 - link

    This is good stuff. AVX512 and its throttling effect is new information to me.
    Please post more often!
  • deil - Wednesday, March 6, 2019 - link

    this design have one more benefit. Hottest parts are way apart on silicon. This means single thread performance might be same as 2-4 threaded. We all use threaded stuff more and more. With this cpu's it really might be a lot of gains, but not in our usual metrics.
  • The_Assimilator - Thursday, March 7, 2019 - link

    Yeah, no. Please do some research before you post BS like this.
  • HStewart - Thursday, March 7, 2019 - link

    I think the for single thread and even multi-threaded performance is not really much depending on separating IO - but more on execution unit changes. More cores does not always mean more performance - it also depends on designed of architexture that makes up cpu.

    The problem with game development unless something has been significant has been change in technology - the display part of screen is a single thread resource.
  • Dachyshun - Wednesday, March 6, 2019 - link

    TR looks to be tick tick on core count. Tick is frequency tick is cores. First gen had 16, gen 2 has 32, gen 3 will have 32, gen 4 gets 64
  • Mazarax - Wednesday, March 6, 2019 - link

    Just wondering... are there any plans by AMD to produce CPUs with AVX-512, or will that forever be an Intel-only extension?
  • Manch - Thursday, March 7, 2019 - link

    It's probably in the pipe.
  • peevee - Wednesday, March 6, 2019 - link

    "AMD’s 3rd Gen Ryzen processors for desktops rely on the brand-new design code-named Matisse. Matisse features two dies: a chiplet die containing eight cores based on the Zen 2 microarchitecture, and built using TSMC’s 7N manufacturing process; and an I/O die featuring PCIe 4.0 lanes"

    Welcome to 2010 (Clarkdale). "Brand new".
  • boozed - Wednesday, March 6, 2019 - link

    So the 2nd gen Ryzen Pro mobile comes after the 3rd gen Ryzen desktop?

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